Cadence Design Systems

Cadence Custom/Analog Design Migration Flow Accelerates Adoption of TSMC Advanced Process Technologies

Retrieved on: 
Monday, September 25, 2023
Software, Mobile, Wireless, Networks, Internet, Hardware, Electronic Design Automation, Data Management, Apps, Applications, Technology, Artificial Intelligence, Semiconductor, Security, TSMC, Virtuoso, Studio, Cadence Design Systems, CDNS, Cadence

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the expansion of its node-to-node design migration flow based on the Cadence® Virtuoso® Studio, which is compatible with all TSMC advanced nodes, including the latest N3E and N2 process technologies.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the expansion of its node-to-node design migration flow based on the Cadence® Virtuoso® Studio, which is compatible with all TSMC advanced nodes, including the latest N3E and N2 process technologies.
  • This generative design migration flow was developed by Cadence and TSMC to provide joint customers with a simplified and automated approach to migrating custom and analog IC designs among TSMC’s advanced process technologies.
  • Customers already using the flow have successfully reduced migration time by up to 3X when compared with manual migration.
  • This flow allows customers to migrate a wide range of analog designs on TSMC process technologies.

Cadence AI-Powered Virtuoso Studio Supports RF and mmWave Design Reference Flows for TSMC N16RF, N6RF and N4PRF

Retrieved on: 
Monday, September 25, 2023
Technology, Mobile, Wireless, Semiconductor, 5G, Software, Internet, Hardware, Electronic Design Automation, Artificial Intelligence, Custom, Kurdistan, Cadence Design Systems, CDNS, Health, ICS, SOC, RFIC, Radar, TSMC, Studio, RF, Automation, Mobile phone, N16, Cadence

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced it has collaborated with TSMC to integrate the new Cadence® Virtuoso® Studio into the TSMC N16 mmWave design reference flow and N6RF design reference flow, and added support for the N4PRF design reference flow.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced it has collaborated with TSMC to integrate the new Cadence® Virtuoso® Studio into the TSMC N16 mmWave design reference flow and N6RF design reference flow, and added support for the N4PRF design reference flow.
  • Mutual customers are already using the design reference flows and corresponding TSMC process design kits (PDKs) for RFIC design projects.
  • The solution supports all aspects of RF design, including passive device modeling, assisted layout automation, and electromagnetics (EM) simulations.
  • “Working closely with TSMC, we have updated our RF reference flows to leverage the unparalleled power of our latest release, Virtuoso Studio.

Cadence to Acquire Intrinsix Corporation from CEVA

Retrieved on: 
Wednesday, September 20, 2023
Semiconductor, Technology, Telecommunications, Mobile, Wireless, Software, Artificial Intelligence, Hardware, Cadence Design Systems, Senior, CDNS, CEVA, IC, IP, Sale, Acquisition, Engineering, Radio, Growth, Mobile phone, Management, Cadence

Cadence Design Systems, Inc. (Nasdaq: CDNS) and CEVA, Inc. (Nasdaq: CEVA), a leading licensor of wireless connectivity and smart sensing technologies, today announced that they have entered into a definitive agreement for Cadence to acquire Intrinsix Corporation, a wholly owned subsidiary of CEVA and a provider of design engineering solutions focused on the U.S. aerospace and defense industry.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) and CEVA, Inc. (Nasdaq: CEVA), a leading licensor of wireless connectivity and smart sensing technologies, today announced that they have entered into a definitive agreement for Cadence to acquire Intrinsix Corporation, a wholly owned subsidiary of CEVA and a provider of design engineering solutions focused on the U.S. aerospace and defense industry.
  • The purchase will bring Cadence a highly skilled engineering team that has expertise in advanced nodes, radio frequency, mixed-signal and security algorithms.
  • “CEVA’s strength over the years has been in developing and licensing semiconductor IP and software, which has powered more than 16 billion devices to date,” said Amir Panush, CEO of CEVA.
  • “With the sale of Intrinsix, we are focusing our efforts on this core expertise, which will allow us to reinforce our leadership position in wireless communications, sensing and edge AI technologies and support our long-term growth strategy.”
    “Cadence and Intrinsix are well-aligned in their missions to enable customers to achieve design excellence,” said Neil Zaman, Senior Vice President and Chief Revenue Officer at Cadence.

Cadence Advances Hyperscale SoC Design with Expanded IP Portfolio for TSMC N3E Process Featuring Next-Generation 224G-LR SerDes IP

Retrieved on: 
Wednesday, September 20, 2023
Electronic Design Automation, Data Management, Semiconductor, Technology, 5G, Artificial Intelligence, Hardware, LLM, Cadence Design Systems, IP Group, PHY, CDNS, SerDes, LR, PCI Express, IP, Chiplet, SOC, UCIe, DDR5, PCI, Machine learning, Media, Hyperscale computing, TSMC, Artificial intelligence, Silicon, VSR, PPA, Cassette tape, Cable television, Cadence

Other Cadence Design IP on the advanced TSMC N3E process has demonstrated silicon success or taped out, providing mutual customers with a wide range of high-speed interface and memory IP for their most advanced designs.

Key Points: 
  • Other Cadence Design IP on the advanced TSMC N3E process has demonstrated silicon success or taped out, providing mutual customers with a wide range of high-speed interface and memory IP for their most advanced designs.
  • Addressing this surging demand, the new 224G-LR SerDes PHY IP and other leading Cadence interface IP on the TSMC N3E process usher in a new era of innovation and high-speed connectivity.
  • Our close collaboration with TSMC enables us to deliver high-quality IP designed to achieve first-pass silicon success and faster time to market.”
    The comprehensive Cadence IP portfolio on the TSMC N3E process supports the Cadence Intelligent System Design™ strategy by enabling advanced-node SoC design excellence.
  • For more information about Cadence’s next-generation 224G SerDes PHY IP and the comprehensive Cadence N3E Design IP portfolio, please visit www.cadence.com/go/N3EDIPPR .

Cadence to Acquire Intrinsix Corporation from CEVA

Retrieved on: 
Wednesday, September 20, 2023
Cadence Design Systems, Senior, CDNS, CEVA, IC, IP, Sale, Acquisition, Engineering, Radio, Software, Mobile phone, Cadence

SAN JOSE, Calif. and ROCKVILLE, Md., Sept. 20, 2023 /PRNewswire/ -- Cadence Design Systems, Inc. (Nasdaq: CDNS) and CEVA, Inc. (Nasdaq: CEVA), a leading licensor of wireless connectivity and smart sensing technologies, today announced that they have entered into a definitive agreement for Cadence to acquire Intrinsix Corporation, a wholly owned subsidiary of CEVA and a provider of design engineering solutions focused on the U.S. aerospace and defense industry. The purchase will bring Cadence a highly skilled engineering team that has expertise in advanced nodes, radio frequency, mixed-signal and security algorithms.

Key Points: 
  • The purchase will bring Cadence a highly skilled engineering team that has expertise in advanced nodes, radio frequency, mixed-signal and security algorithms.
  • "CEVA's strength over the years has been in developing and licensing semiconductor IP and software, which has powered more than 16 billion devices to date," said Amir Panush, CEO of CEVA.
  • "Cadence and Intrinsix are well-aligned in their missions to enable customers to achieve design excellence," said Neil Zaman, Senior Vice President and Chief Revenue Officer at Cadence.
  • The acquisition is expected to be immaterial to revenue and earnings this year for Cadence and is subject to certain closing conditions.

Cadence Accelerates On-Device and Edge AI Performance and Efficiency with New Neo NPU IP and NeuroWeave SDK for Silicon Design

Retrieved on: 
Wednesday, September 13, 2023
Electronic Design Automation, Semiconductor, Technology, Other Technology, Software, Artificial Intelligence, Hardware, Natural language processing, TensorFlow, Cadence Design Systems, Magic, CDNS, Internet of things, Macs, ML, Neo, Multimedia, Research, SOC, FP16, NLP, CNN, DSPS, Personal computer, Radar, Apache MXNet, Investment, NPU terminology, Socs, RNN, JAX, Architecture, PyTorch, ADAS, Integer, PPA, ONNX, SDK, AR, KPI-driven code analysis, Automation, Medical device, Video game, Cadence, Tensilica, AI

The new highly scalable Cadence® Neo™ Neural Processing Units (NPUs) deliver a wide range of AI performance in a low-energy footprint, bringing new levels of performance and efficiency to AI SoCs.

Key Points: 
  • The new highly scalable Cadence® Neo™ Neural Processing Units (NPUs) deliver a wide range of AI performance in a low-energy footprint, bringing new levels of performance and efficiency to AI SoCs.
  • Complementing the AI hardware, the new NeuroWeave™ Software Development Kit (SDK) provides developers with a “one-tool” AI software solution across Cadence AI and Tensilica® IP products for no-code AI development.
  • View the full release here: https://www.businesswire.com/news/home/20230913932401/en/
    The new highly scalable Cadence® Neo™ Neural Processing Units (NPUs) deliver a wide range of AI performance in a low-energy footprint, bringing new levels of performance and efficiency to AI SoCs.
  • Complementing the AI hardware, the new NeuroWeave™ Software Development Kit (SDK) provides a "one-tool" AI software solution across Cadence AI and Tensilica IP products for no-code AI development.

Cadence Unveils Next-Generation AI-Driven OrCAD X Delivering Up to 5X Faster PCB Design and Enabled with Cadence OnCloud

Retrieved on: 
Tuesday, September 12, 2023
Data Management, Apps, Applications, Technology, Software, Networks, Artificial Intelligence, Internet, Cloud, Data management, Custom, Cadence Design Systems, Exhibition, CDNS, Documentation, PCB, UX, AI, OrCAD, Environment, Automation, Video game, Printed circuit board, Cadence, Allegro

The new OrCAD X Platform streamlines the system design process and empowers designers through cloud scalability and AI-powered placement automation technology, enabling up to 5X reduction in design turnaround time.

Key Points: 
  • The new OrCAD X Platform streamlines the system design process and empowers designers through cloud scalability and AI-powered placement automation technology, enabling up to 5X reduction in design turnaround time.
  • Supercharged with powerful layout productivity improvements based on the Cadence Allegro® X Platform, it provides complete backward data compatibility with OrCAD and Allegro technologies.
  • The new OrCAD X platform provides the following benefits:
    Cloud-enabled: Improves productivity with real-time access to data management via the Cadence OnCloud Platform.
  • The new OrCAD X PCB layout has a remarkably intuitive user interface, which allows me to accelerate design closure.

Cadence Completes Acquisition of PHY IP Assets from Rambus

Retrieved on: 
Thursday, September 7, 2023
5G, Software, Internet, Hardware, Electronic Design Automation, Data Management, Technology, Semiconductor, SerDes, AI, Intelligent system, Rambus Inc. v. Nvidia, Cadence Design Systems, Acquisition, CPU, PHY, CDNS, IP, Video game

Cadence Design Systems, Inc. (Nasdaq: CDNS) announced today that it has completed the previously announced acquisition of the SerDes and memory interface PHY IP business from Rambus Inc. With the continued proliferation of AI, data center and hyperscale applications, CPU architectures, and networking devices, the technology asset purchase enriches Cadence’s established IP portfolio and augments the company’s Intelligent System Design™ strategy, which drives design excellence.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) announced today that it has completed the previously announced acquisition of the SerDes and memory interface PHY IP business from Rambus Inc. With the continued proliferation of AI, data center and hyperscale applications, CPU architectures, and networking devices, the technology asset purchase enriches Cadence’s established IP portfolio and augments the company’s Intelligent System Design™ strategy, which drives design excellence.
  • The acquisition also comes with the addition of experienced PHY engineering teams in the United States, India and Canada, further expanding Cadence’s domain-rich talent base.

Rambus Completes Sale of PHY IP Assets to Cadence

Retrieved on: 
Thursday, September 7, 2023
Data Management, Technology, IOT (Internet of Things), Semiconductor, Apps, Applications, Software, Networks, Internet, Mobile, Wireless, Hardware, Electronic Design Automation, Sale, Security (finance), Silicon, Rambus Inc. v. Nvidia, RMBS, Inc., Cadence Design Systems, Rambus, AI, Sumathi Best Television Current Reporting Award, PHY, 3D printing, Financial adviser, Cryptocurrency

Rambus Inc. (NASDAQ: RMBS ) a premier chip and silicon IP provider making data faster and safer, today announced the completion of the previously announced sale of its PHY IP business to Cadence Design Systems, Inc. With this transaction, Rambus strengthens its focus on high-growth chips and digital IP, including novel memory solutions for high-performance computing, to support the continued evolution of the data center and AI.

Key Points: 
  • Rambus Inc. (NASDAQ: RMBS ) a premier chip and silicon IP provider making data faster and safer, today announced the completion of the previously announced sale of its PHY IP business to Cadence Design Systems, Inc. With this transaction, Rambus strengthens its focus on high-growth chips and digital IP, including novel memory solutions for high-performance computing, to support the continued evolution of the data center and AI.
  • Separately, Rambus affirmed its previously issued guidance for the fiscal quarter ending September 30, 2023, as set forth on the Current Report on Form 8-K furnished with the Securities and Exchange Commission on July 31, 2023.

Cadence Collaborates with Arm to Accelerate Neoverse V2 Data Center Design Success with Cadence AI-driven Flows

Retrieved on: 
Wednesday, August 30, 2023
Data Management, Technology, Security, Apps, Applications, Software, Artificial Intelligence, Networks, Internet, Mobile, Wireless, Hardware, Electronic Design Automation, Cadence Design Systems, RTL, CDNS, Arm, EDA, Palladium, Business, ML, M120 Rak, Central processing unit, ARM Neoverse, SOC, Protium, SBSA, PCI, Tempus, HPC, GDS, AI, Silicon, Digital, PPA, Environment, VIP, Video game, Cryptocurrency, Cadence, Helium

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced an expanded collaboration with Arm to speed data center silicon success on the Arm® Neoverse™ V2 platform.

Key Points: 
  • Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced an expanded collaboration with Arm to speed data center silicon success on the Arm® Neoverse™ V2 platform.
  • In addition, the Cadence® AI-driven verification full flow supports Neoverse V2, providing designers with optimal verification throughput and preparedness for Arm SystemReady compliance.
  • The digital RAKs provide Arm Neoverse V2 designers with several key benefits.
  • For example, the Cadence Cerebrus AI capabilities automate and scale digital chip design, delivering better PPA and improving designer productivity.