IDT Extends Leadership in Datacenter and Networking Systems with Launch of Its Latest PCI Express Timing Devices
Retrieved on:
Monday, April 30, 2018
Both families offer substantial performance upgrades, providing 50% margin to the PCIe Gen4 clock jitter limit of 0.5ps rms.
Key Points:
- Both families offer substantial performance upgrades, providing 50% margin to the PCIe Gen4 clock jitter limit of 0.5ps rms.
- The PhiClock 9FGV100x device family combines space savings, high performance and low power in a single, easy-to-use solution.
- All PhiClock devices integrate crystal load capacitors and offer an optional integrated crystal to simplify designs and save board space.
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