MIPI I3C

Major Update to MIPI CSI-2 Camera Specification Enables Next Generation of Always On, Low Power, Machine Vision Applications

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Tuesday, February 8, 2022
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Originally introduced in 2005, MIPI CSI-2 has become the worlds most widely implemented embedded camera and imaging interface.

Key Points: 
  • Originally introduced in 2005, MIPI CSI-2 has become the worlds most widely implemented embedded camera and imaging interface.
  • Typically implemented for shorter-reach applications on either a MIPI C-PHY or MIPI D-PHY physical-layer interface, v4.0 is the first to support transmission of CSI-2 image frames over the low-cost, low-pin-count MIPI I3C/I3C Basic two-wire interface.
  • MIPI CSI-2 v4.0 is available to MIPI Alliance members and can be downloaded from the member portal on the MIPI Alliance website.
  • To keep up with MIPI Alliance, subscribe to the MIPI blog and stay connected by following MIPI on Twitter , LinkedIn , Facebook and YouTube .

Update to Royalty-Free MIPI I3C Basic Utility and Control Bus Specification Boosts Speed and Flexibility

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Tuesday, September 21, 2021
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The updated version of I3C Basic provides for extensible use of extra bus lanes to increase the interface speed to nearly 100 MHz, future-proofing the interface for rising speed requirements. The new version includes two High Data Rate (HDR) modes -- HDR Double Data Rate (HDR-DDR) and HDR Bulk Transport (HDR-BT) -- which are designed to transfer more data at the same bus frequency:

Key Points: 
  • The MIPI Alliance , an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced the first update to its publicly available, royalty-free, MIPI I3C Basic specification.
  • Available for implementation without MIPI Alliance membership, I3C Basic is a subset of the full MIPI I3C specification that bundles the features most commonly needed by developers and other standards organizations.
  • The updated version of I3C Basic provides for extensible use of extra bus lanes to increase the interface speed to nearly 100 MHz, future-proofing the interface for rising speed requirements.
  • With these updates, we continue to strengthen the upgrade path from I2C and advance I3C as the universal utility and control bus.