Primarius to Showcase DTCO-Enabled EDA Solutions at DAC Powered by Next-Generation SPICE and FastSPICE Technology

• Demos Will Feature One-Stop Design Enablement Solutions for Device Characterization, SPICE Modeling, PDK Development
  
• Other Demos Include Far-Ranging Capabilities of Circuit Simulation and Analysis Portfolio, Cloudy-Ready Standard Cell Characterization Solutions

SAN JOSE, Calif., July 06, 2023 (GLOBE NEWSWIRE) -- Primarius Technologies will showcase its Design-Technology Co-Optimization (DTCO)-enabled EDA solutions powered by the latest generation SPICE and FastSPICE technologies at the Design Automation Conference (DAC) July 10-12 at Moscone Center in San Francisco.

“Visitors to our DAC booth will see the breadth of solutions to ensure designers meet time-to-market windows and optimize their designs for better yield, power, performance and area,” remarks Dr. Lianfeng Yang, President at Primarius Technologies. “We differentiate ourselves with one-stop design enablement solutions for device characterization, SPICE modeling, PDK development and standard cell library characterization, and a complete circuit simulation and analysis portfolio using the latest SPICE and FastSPICE technology.”

Demonstrations will highlight the more than 2X performance boost in SPICE and FastSPICE simulation with the introduction of NanoSpice X™ and NanoSpice Pro X™ that combines 10 plus years of continuous innovations on circuit simulation by Primarius’ team. NanoSpice X shows significant new improvements in large post-layout SPICE simulation for full-chip analog designs with complicated digital circuits where huge power and ground nets slowed SPICE simulation previously. NanoSpice Pro X for FastSPICE simulation provides better performance and usability for challenging designs including advanced SRAM, DRAM, Flash and other large block or full-chip designs. Both circuit analysis solutions offer comprehensive high-yield and signal integrity analysis, aging and EM/IR simulation and advanced circuit checking capabilities.

Primarius’ NanoCell™, a next-generation cloud-ready standard cell library characterization solution, can provide accurate and near-linear scaling performance on more than 10,000 cores through industry-proven modeling and simulation engines. The DAC demonstration will offer examples of its faster library characterization abilities for advanced process nodes.

Other demonstrations will feature 9812AC™, the first AC low-frequency dynamic noise test system for advanced process development, and SDEP™, a spec-driven modeling automation platform for efficient and quality SPICE model auto-generation. Also, PCellLab™ and PQLab™, an intuitive, efficient and quality PCell auto-generation for PDK development platform with full PDK quality assurance capabilities.

At 2023 Design Automation Conference
Primarius Technologies will exhibit for the 13th consecutive year at DAC in Booth #1419 (First floor) Monday, July 10, through Wednesday, July 12, from 10 a.m. until 6 p.m. at the Moscone Center in San Francisco.

To arrange a meeting or demonstration of the Primarius Technologies product portfolio, send email to: [email protected].

About Primarius
Primarius Technologies (688206.SH) is a global electronic design automation (EDA) company providing innovative DTCO-enabled EDA solutions for advanced technology development, and complex full custom designs including analog, mixed-signal and memory circuits. Primarius provides the industry’s de facto golden SPICE modeling solution adopted by most of the leading semiconductor companies for more than a decade, and leading SPICE/FastSPICE technologies proven by leading memory and SoC design companies worldwide. Its design enablement EDA solutions enable a full coverage of fab technology development and fabless COT flow development including device testing systems, SPICE modeling and PDK development solutions, and standard cell library characterization solutions. Built around an innovative SPICE/FastSPICE dual engine, Primarius provides a complete circuit simulation and analysis solution with comprehensive high-yield and signal integrity analysis, aging and EM/IR simulation and advanced circuit checking capabilities. Primarius also provides a complete full custom design environment with advanced circuit design and optimization, layout automation and physical verification functions, and hierarchy design planning and timing analysis solutions for advanced SoC designs. Visit Primarius Technologies for more information.

NanoSpice, NanoDesigner, PCellLab, PQLab, NanoCell, LibWiz and SDEP are trademarks of Primarius Technologies. Primarius Technologies acknowledges trademarks or registered trademarks of other organizations for their respective products.