Symmetric multiprocessing

PX5 RTOS Simplifies Development of 64-bit Hard Real-Time Applications with Support for IAR Embedded Workbench for Arm

Retrieved on: 
Monday, June 12, 2023
Other Manufacturing, Technology, Security, Software, Manufacturing, Networks, Internet, Hardware, Electronic Design Automation, IOT (Internet of Things), Cortex, Product management, IAR, PXR, AMP, Arm, Memory corruption, Internet of things, API, SMP, Asymmetric, Investment, Asymmetric multiprocessing, Linux, Workload, POSIX, PDV, Symmetric multiprocessing, Safety, Computer data storage

PX5, a global leader in high-performance real-time operating systems and middleware, today announced hard real-time Asymmetric Multiprocessing (AMP) and Symmetric Multiprocessing (SMP) support for the 64-bit Arm architecture integrated with the IAR Embedded Workbench® for Arm® development environment.

Key Points: 
  • PX5, a global leader in high-performance real-time operating systems and middleware, today announced hard real-time Asymmetric Multiprocessing (AMP) and Symmetric Multiprocessing (SMP) support for the 64-bit Arm architecture integrated with the IAR Embedded Workbench® for Arm® development environment.
  • This new support brings unprecedented load balancing and security features to hard real-time applications and complements existing PX5 RTOS Arm support for the 32-bit Cortex-M, Cortex-R, and Cortex-A architectures.
  • “Many applications that demand hard real-time and deterministic processing require capabilities well beyond those of embedded Linux, the most popular operating system for Arm 64-bit architectures,” said William Lamie, CEO, PX5.
  • The industrial-grade PX5 RTOS is an advanced, fifth-generation RTOS designed for the most demanding embedded applications with best-of-class size, performance, safety, and security.

Tachyum Celebrates 2022 and Announces 2023 Series C and Volume Production Plans

Retrieved on: 
Tuesday, January 3, 2023
Semiconductor, Data Management, Technology, Networks, Artificial Intelligence, Hardware, Information technology, GNU Compiler Collection, Expo, Intelligent Platform Management Interface, Faculty, GCC, Semiconductor, Economics, Prodigy (online service), Reliability, LINPACK, Czech Technical University in Prague, HPC, FPGA, UEFI, RAS, KVM, SOC, Deep learning, BMC, Availability, FPU, QEMU, Symmetric multiprocessing, Microsoft, BIOS, OPEX, Virtual machine, Shenzhen NORCO Intelligent Technology, ISC High Performance, FreeBSD, InfiniBand, QA, IEEE, Expo 2020, SMP, Security-Enhanced Linux, CAPEX, Silicon, Quality assurance, Go (programming language), Carbon, GPU, Symmetry, Computer data storage, Video game console, Prodigy, Serviceability, AI, Linux

Prodigy exceeded its performance targets and is significantly faster than any processors currently available in hyperscale, HPC and AI markets.

Key Points: 
  • Prodigy exceeded its performance targets and is significantly faster than any processors currently available in hyperscale, HPC and AI markets.
  • Tachyum completed the final piece of its core software stack with a Baseboard Management Controller (BMC) running on a Prodigy emulation system.
  • Company executives were among the featured presenters at ISC High Performance 2022 and Supercomputing 2022 events.
  • With its Series C funding, expected to close in 2023, Tachyum will finance the volume production of Prodigy Universal Processor Chip and be positioned for sustained profitability, as well as increase headcount.

Smaller Code, Higher Performance: Latest IAR Embedded Workbench for RISC-V Leverages CoDense™ from Andes

Retrieved on: 
Wednesday, November 16, 2022
Electronic Design Automation, Data Management, Semiconductor, Security, Technology, Other Technology, Software, Symmetric multiprocessing, MCU, CERT, Visual Studio Code, Asymmetric, Software, MISRA C, SME, Andes Technology, Developer, Arm, Symmetry, IAR, IAR Systems, The Hepatitis C Trust, Name, Certification, MISRA, AMP, ISA, Socs, SMP, Safety, Common Weakness Enumeration, Instruction set architecture, Trace, Coremark, CWE, IOT, Architecture, Video game console

IAR Systems, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded Workbench for RISC-V for the CoDense extension of Andes Technologys AndeStar V5 RISC-V processor.

Key Points: 
  • IAR Systems, the world leader in software and services for embedded development, has just announced the full support of their latest release of IAR Embedded Workbench for RISC-V for the CoDense extension of Andes Technologys AndeStar V5 RISC-V processor.
  • Andes is a founding Premier member of RISC-V International and a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions.
  • For more information on the IAR Embedded Workbench for RISC-V, the functional safety-certified edition of the tool suite, and IAR Systems overall offering for RISC-V, please visit https://www.iar.com/riscv .
  • Editor's Note: IAR Systems, IAR Embedded Workbench, Embedded Trust, C-Trust, C-SPY, C-RUN, C-STAT, IAR Visual State, I-jet, I-jet Trace, IAR Academy, IAR, and the logotype of IAR Systems are trademarks or registered trademarks owned by IAR Systems AB.

Tachyum Prodigy FPGA Running Applications in Linux Interactive Mode

Retrieved on: 
Tuesday, May 3, 2022
Technology, Networks, Hardware, Data Management, Economics, DDR5, GPU, Quality assurance, Maintenance, SMP, CPU, HPC, QA, RTL, TPU, PCI Express, IPS, PCI, Symmetric multiprocessing, Law of large numbers, Symmetry, IP, CEO, AI, Israel Inter-University Computation Center, IPO, Video game console, Linux, Prodigy, FPGA

Tachyum Inc. today announced that it has progressed to running applications in Linux interactive mode on Prodigy FPGA hardware with SMP (Symmetric Multi-Processing) Linux and the floating-point unit enabled on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor.

Key Points: 
  • Tachyum Inc. today announced that it has progressed to running applications in Linux interactive mode on Prodigy FPGA hardware with SMP (Symmetric Multi-Processing) Linux and the floating-point unit enabled on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor.
  • The next milestone will be demonstrating the now completed vectorizing compiler to show Prodigy running vectorized code on the FPGA.
  • We believe that with the new IPs we are ultimately ensuring that the final production version of Prodigy will perform better than expected.
  • We are eager to bring Prodigy to market and revolutionize the concept of a data center, forever, said Dr. Radoslav Danilak, founder and CEO of Tachyum.

ScaleMP Demonstrates Best-in-Class Large-System Results

Retrieved on: 
Tuesday, January 14, 2020
Semiconductor, Hardware, Data management, Technology, Software, Computer memory, Digital technology, Computing, Parallel computing, Classes of computers, Computers, Virtualization, Dynamic random-access memory, Symmetric multiprocessing, Random-access memory, vSMP Foundation, ScaleMP

vSMP MemoryONE enables the transparent use of NVM storage as system memory, to reduce TCO and expand beyond traditional DRAM scaling limitations.

Key Points: 
  • vSMP MemoryONE enables the transparent use of NVM storage as system memory, to reduce TCO and expand beyond traditional DRAM scaling limitations.
  • ScaleMP is the leader in virtualization for high-end computing, providing increased performance and total cost of ownership (TCO) reduction.
  • Using software to replace custom hardware systems and components, ScaleMP offers a revolutionary scale-up computing paradigm by delivering industry-standard, high-end symmetric multiprocessing compute and memory environments.
  • vSMP Foundation is a trademark or registered trademark of ScaleMP.