Process design kit

Ansys and TSMC Enable a Multiphysics Platform for Optics and Photonics, Addressing Needs of AI, HPC Silicon Systems

Retrieved on:

Wednesday, April 24, 2024

Synopsys, Process, HPC, TSMC, Verilog, Silicon, OIP, Innovation, Communication, Artificial intelligence, Transport, PDK, Compiler, Process design kit, Silicon photonics, Electronics, TMI, ANSYS, Printed circuit board

PITTSBURGH, April 24, 2024 /PRNewswire/ -- Ansys (NASDAQ: ANSS) today announced a collaboration with TSMC on multiphysics software for TSMC's Compact Universal Photonic Engines (COUPE). COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.

Key Points:

COUPE is a cutting-edge Silicon Photonics (SiPh) integration system and Co-Packaged Optics platform that mitigates coupling loss while significantly accelerating chip-to-chip and machine-to-machine communication.
TSMC COUPE, along with Ansys multiphysics solutions that are integrated with Synopsys' 3DIC Compiler unified exploration-to-signoff platform, enables the next generation of silicon photonics and co-packaged optics designs for applications in AI, datacenter, cloud, and HPC communications.
The work spans multiple areas, including fiber-to-chip coupling, integrated electronic-photonic chip design, power integrity verification, high-frequency electromagnetic analysis, and critical thermal management.
TSMC COUPE integrates multiple electrical ICs with a photonic IC and fiber optic connections into a single package.

Intel and UMC Announce New Foundry Collaboration

Retrieved on:

Thursday, January 25, 2024

Electronic Design Automation, Semiconductor, Engineering, Technology, Manufacturing, Hardware, Intel, Credit, Multimedia, Process, INTC, History, Ecosystem, Communication, PDK, Investment, UMC, United Microelectronics Corporation, Process design kit

(Credit: Intel Corporation)

Key Points:

(Credit: Intel Corporation)
“Taiwan has been a critical part of the Asian and global semiconductor and broader technology ecosystem for decades, and Intel is committed to collaborating with innovative companies in Taiwan, such as UMC, to help better serve global customers,” said Stuart Pann, Intel senior vice president and general manager of Intel Foundry Services (IFS).
IFS has made significant progress over the past year, building strong momentum with new customers, including new customers across the Intel 16, Intel 3 and Intel 18A process technologies, and expanding its growing foundry ecosystem.
UMC has a more than 40-year history of being a preferred supplier of foundry services to critical applications including automotive, industrial, display and communications.
UMC is a significant supplier to the top 400+ semiconductor customers and has extensive expertise and know-how in supporting customers to reach high yields while maintaining industry-leading foundry utilization.

Akoustis Launches State-of-the-Art XBAW® Foundry Services and AI-Enabled Engineering Design Software

Retrieved on:

Tuesday, June 13, 2023

IDM, Kurdistan, Wi-Fi, Process, Calendar, Process design kit, Machine learning, Algorithm, Engineering, MEMS, XB1, BAW, Mobile phone

Akoustis’ world class foundry will provide customers with unmatched bulk acoustic wave (BAW) fabrication capabilities on 150-mm Si substrates.

Key Points:

Akoustis’ world class foundry will provide customers with unmatched bulk acoustic wave (BAW) fabrication capabilities on 150-mm Si substrates.
Akoustis’ foundry will offer distinct XBAW® technology, catering to different frequency ranges and providing customers with unparalleled flexibility.
As a part of its comprehensive solution, Akoustis provides automated Process Design Kits (PDKs) leveraging machine learning algorithms to customers, facilitating efficient and accurate design implementations.
Akoustis continues to add new Wi-Fi design wins, many of which are expected to ramp into production in calendar 2023.

Samsung Electronics’ World-Class 5nm Technology Selected by Ambarella for New Automotive AI Central Domain Controller

Retrieved on:

Tuesday, February 21, 2023

Samsung Electronics , a world leader in advanced semiconductor technology, and Ambarella, Inc. (NASDAQ: AMBA), an edge AI semiconductor company, today announced that Samsung’s Foundry business is providing its 5-nanometer (nm) process technology to Ambarella for its newly announced CV3-AD685 automotive AI central domain controller.

Key Points:

Samsung Electronics , a world leader in advanced semiconductor technology, and Ambarella, Inc. (NASDAQ: AMBA), an edge AI semiconductor company, today announced that Samsung’s Foundry business is providing its 5-nanometer (nm) process technology to Ambarella for its newly announced CV3-AD685 automotive AI central domain controller.
View the full release here: https://www.businesswire.com/news/home/20230221005394/en/
Integrated Ambarella CV3-AD685 system-on-chip built on Samsung Foundry’s 5nm technology (Graphic: Business Wire)
The CV3-AD685 is the first production version of Ambarella’s CV3-AD family of automotive AI central domain controllers, with Tier-1 automotive suppliers announcing they will offer solutions using the CV3-AD system-on-chip (SoC) product family.
Samsung’s 5nm process technology is optimized for automotive-grade semiconductors, with extremely tight process controls and advanced IP for exceptional reliability and outstanding traceability.
Samsung Foundry’s industry-leading process technology and advanced 3D-packaging solutions are powering many of the latest mobile, HPC and automotive solutions.

Cadence Achieves PCIe 5.0 Specification Compliance for PHY and Controller IP in TSMC Advanced Technologies

Retrieved on:

Tuesday, June 21, 2022

The Cadence IP for PCIe 5.0 technology consists of a PHY, companion controller and Verification IP (VIP) targeted at SoC designs for very high-bandwidth hyperscale computing, networking and storage applications.

Key Points:

The Cadence IP for PCIe 5.0 technology consists of a PHY, companion controller and Verification IP (VIP) targeted at SoC designs for very high-bandwidth hyperscale computing, networking and storage applications.
With Cadences PHY and Controller Subsystem for PCIe 5.0 architecture, customers can design extremely power-efficient SoCs while accelerating time to market.
We are pleased Cadence has certified its comprehensive IP family for compliance with the PCIe 5.0 protocol on TSMCs advanced processes, said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC.
Cadences comprehensive portfolio of design IP solutions in the TSMC advanced processes also includes 112G, 56G, die-to-die (D2D) and advanced memory IP solutions.

Akoustis Receives Purchase Order from New Tier-1 Mobile Customer

Retrieved on:

Thursday, December 16, 2021

Charlotte, N.C., Dec. 16, 2021 (GLOBE NEWSWIRE) -- Akoustis Technologies, Inc. (NASDAQ: AKTS) (“Akoustis” or the “Company”), an integrated device manufacturer (IDM) of patented bulk acoustic wave (BAW) high-band RF filters for mobile and other wireless applications, announced today that it has received a purchase order from a new tier-1 module maker customer for the development of a 5G mobile XBAW™ filter.

Key Points:

Akoustis plans to help develop initial samples of the filter in the next several months and establish a foundry arrangement with the customer targeting production ramp in the second half of calendar 2023.
The new customer is a multi-billion-dollar tier-1 module maker that plans to use Akoustis leading patented XBAW technology to deliver best-in-class 5G mobile modules in challenging bands above 2GHz.
Jeff Shealy, founder and CEO of Akoustis, stated, Our engagements and activity with 5G mobile customers targeting CY23/24 production ramps continue to expand beyond earlier expectations.
Akoustis plans to service the fast growing multi-billion-dollarRF filter market using its integrated device manufacturer (IDM) business model.

Cadence Pegasus Verification System Certified for Samsung Foundry 5nm and 7nm Process Technologies

Retrieved on:

Monday, April 19, 2021

Electronic design automation, Semiconductor, Technology, Mobile, Wireless, Software, Hardware, Companies, Industry economics), Technology, Electronic design automation, Hardware verification languages, Semiconductor device fabrication, Signoff, 5 nm process, Cadence Design Systems, Samsung Electronics, Process design kit, Verification

b'Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence\xc2\xae Pegasus\xe2\x84\xa2 Verification System has achieved certification for Samsung Foundry\xe2\x80\x99s 5nm and 7nm process technologies.

Key Points:

b'Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence\xc2\xae Pegasus\xe2\x84\xa2 Verification System has achieved certification for Samsung Foundry\xe2\x80\x99s 5nm and 7nm process technologies.
Samsung Foundry also delivered an enhanced, signoff-accurate process design kit (PDK) to facilitate the adoption of the Pegasus Verification System on the Samsung 5nm and 7nm technologies.\nThe Pegasus Verification System offers many advantages for engineers creating designs using Samsung\xe2\x80\x99s advanced nodes.
Additionally, the Pegasus Verification System features a tight, interactive integration with the Cadence Virtuoso\xc2\xae Layout Suite environment.
For more information on the Pegasus Verification System, please visit www.cadence.com/go/pegasusadvnd .\n\xe2\x80\x9cWe value our collaboration with Cadence and have worked diligently to enable our mutual customers to sign off their designs using the Pegasus Verification System and Samsung Foundry\xe2\x80\x99s advanced-node process technologies,\xe2\x80\x9d said Jong-Wook Kye, vice president of the Design Enablement Team at Samsung Electronics.

SkyWater Releases Early Access PDK and Partners with Trusted Semiconductor Solutions to Enable Design Kit for 90 nm Strategic Rad-Hard by Process Platform

Retrieved on:

Wednesday, December 2, 2020

Integrated circuits, Computer engineering, Semiconductor devices, Electronic engineering, PDK, Radiation hardening, Ice, Process design kit

To create the RH90 design kit, SkyWater partnered with Trusted Semiconductor Solutions , experts in radiation hardened (rad-hard) microelectronics and advanced system-on-chip and system-in-package solutions for military, space and industrial markets, to develop IP based on the PDK and the RH90 process.

Key Points:

To create the RH90 design kit, SkyWater partnered with Trusted Semiconductor Solutions , experts in radiation hardened (rad-hard) microelectronics and advanced system-on-chip and system-in-package solutions for military, space and industrial markets, to develop IP based on the PDK and the RH90 process.
The RH90 design kit includes a PDK, a rad-hard standard cell library and core IP blocks that build the foundation for supporting customers on this technology platform.
"Trusted Semiconductor Solutions was instrumental in the development of the RH90 PDK and IP libraries," said John Kent, SkyWater executive vice president, technology development and design enablement.
To register for the NSREC webinar on SkyWater's 90 nm Strategic Rad-Hard by Process platform, please visit: www.nsrec.com .

Google Partners with SkyWater and Efabless to Enable Open Source Manufacturing of Custom ASICs

Retrieved on:

Thursday, November 12, 2020

Electronic engineering, Integrated circuits, Digital electronics, Computer engineering, Electrical engineering, Electronic design, Semiconductor devices, Semiconductor device fabrication, Application-specific integrated circuit, Linux Foundation, Process design kit, CMOS

Through a partnership between Google, SkyWater and Efabless, open source designs selected by the program will be fabricated at no cost to the designers.

Key Points:

Through a partnership between Google, SkyWater and Efabless, open source designs selected by the program will be fabricated at no cost to the designers.
The MPW program is enabled by the first foundry-supported open source process design kit (PDK) for 130 nm mixed-signal CMOS technologies (SKY130 process).
The initiative will enable a complete open source manufacturing supply chain for custom application specific integrated circuits (ASICs) and has been discussed in a series of talks produced by the FOSSi(Free and Open Source Silicon) Foundation including presentations by Google and Efabless.
Google has a strong history of supporting open source silicon through being a founding member of both the RISC-V Foundation and the Linux Foundation's CHIPS Alliance project.

GLOBALFOUNDRIES Collaborates with Cadence on Availability of Mixed-Signal OpenAccess PDK for 22FDX Platform to Enable Advanced Mixed-Signal and mmWave Design

Retrieved on:

Thursday, September 24, 2020

Semiconductor, Hardware, Data management, Technology, Software, Companies, Computing, Cadence Design Systems, Technology, Process design kit, OpenAccess, 5G, GlobalFoundries, PDK, Interoperable PDK Libraries

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a collaboration with GLOBALFOUNDRIES (GF) that resulted in the availability of a Mixed-Signal OpenAccess process design kit (PDK) that supports GFs 22FDX platform.

Key Points:

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a collaboration with GLOBALFOUNDRIES (GF) that resulted in the availability of a Mixed-Signal OpenAccess process design kit (PDK) that supports GFs 22FDX platform.
To advance the adoption of the 22FDX platform and help customers speed time to market, the PDK ensures that the qualified Cadence digital, custom and RF design tools seamlessly interoperate with the GF 22FDX platform, simplifying next-generation 5G mmWave, edge artificial intelligence (AI), IoT and automotive application design.
The Mixed-Signal OpenAccess PDK for the GF 22FDX platform enables a highly interoperable flow featuring the Cadence digital full flow and the Cadence custom and RF platforms.
The Cadence digital full flow, custom and RF platforms support the Cadence Intelligent System Design strategy, enabling customers to achieve SoC design excellence.