3DIC

Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC’s N6RF+ Process Node

Retrieved on: 
Wednesday, April 24, 2024
Technology, Mobile, Wireless, Semiconductor, Telecommunications, HPC, TSMC, ROI, Ecosystem, High-pass filter, OIP, Innovation, Partnership, Workflow, 3DIC, Library, Engineering, RF, SNPS, ADM, PPA, Multimedia, LNA

The new migration workflow integrates millimeter wave (mmWave) and RF solutions from Keysight, Synopsys, and Ansys into an efficient design flow that streamlines re-design of passive devices and design components to TSMC’s more advanced RF process.

Key Points: 
  • The new migration workflow integrates millimeter wave (mmWave) and RF solutions from Keysight, Synopsys, and Ansys into an efficient design flow that streamlines re-design of passive devices and design components to TSMC’s more advanced RF process.
  • View the full release here: https://www.businesswire.com/news/home/20240424725417/en/
    The new Synopsys, Keysight, and Ansys N16 to N6RF+ integrated radio frequency design migration workflow.
  • (Graphic: Business Wire)
    This RF design migration initiative extends TSMC’s Analog Design Migration (ADM) methodology with additional capabilities for RF circuit designers.
  • Beyond the productivity gains offered by ADM, the Keysight, Synopsys, and Ansys migration workflow demonstrates significant power reduction for a 2.4GHz low noise amplifier (LNA) design re-targeted to the N6RF+ process.

TSMC’s Kumamoto Plant (JASM) Grand Opening on 24th February, Poised to Shape Japan’s Semiconductor Landscape Over the Next Decade, Says TrendForce

Retrieved on: 
Friday, February 23, 2024
Environment, Apps, Applications, Technology, Semiconductor, Professional Services, Sustainability, Software, Audio, Video, Green Technology, Data Analytics, Sony, SUMCO, Tohoku University, TEL, Table, Government, SCREEN, Renesas Electronics, Lead, Water resources, TSMC, Ecosystem, JSR, Mitsubishi Electric, 3DIC, ROHM

This figure is expected to climb to around $131.65 billion in 2024, increasing TSMC’s share to 62%.

Key Points: 
  • This figure is expected to climb to around $131.65 billion in 2024, increasing TSMC’s share to 62%.
  • The much-anticipated opening of TSMC’s Kumamoto Plant (JASM) in Japan on the 24th marks TSMC’s debut factory in Japan (Fab-23), signaling a bold step into the future.
  • TrendForce envisions Japan developing three semiconductor powerhouses in Kyushu, Tohoku, and Hokkaido, with Kyushu taking the lead, especially as the home of TSMC’s Kumamoto plant.
  • With concerted efforts from industry, government, and academia, Japan is on the brink of creating a comprehensive semiconductor manufacturing ecosystem.

Alchip Unveils AI 3DIC Design and IP Platform

Retrieved on: 
Wednesday, December 13, 2023
PI, TSMC, 3DIC, Artificial intelligence, AI, IP, SerDes, TSV, Advantage, Alchip, Memory, SRAM

Taipei, Taiwan, Dec. 13, 2023 (GLOBE NEWSWIRE) -- Alchip Technologies today revealed that the company presented a paper at the TSMC 2023 Taiwan Open Innovation Platform® Ecosystem Forum showcasing its ground-breaking collaborative advanced artificial intelligence (AI) 3DIC chiplet design and integrated IP methodology.

Key Points: 
  • Taipei, Taiwan, Dec. 13, 2023 (GLOBE NEWSWIRE) -- Alchip Technologies today revealed that the company presented a paper at the TSMC 2023 Taiwan Open Innovation Platform® Ecosystem Forum showcasing its ground-breaking collaborative advanced artificial intelligence (AI) 3DIC chiplet design and integrated IP methodology.
  • The platform also assembled the bottom die, top die, 3D-APlink interconnects, power and thermal solutions.
  • AI chip designers are now freed to push the boundaries of AI capabilities, leading to more powerful, efficient, and scalable artificial intelligence systems.
  • Alchip revealed in the presentation that they designed the 3DIC device using TSMC’s CoWoS® advanced packaging to integrate the advanced SerDes IP.

The IEEE International Roadmap for Devices and Systems (IRDS) Emerges as a Global Leader for Chips Acts Visions and Programs

Retrieved on: 
Tuesday, December 12, 2023
SCR, 3DIC, Ecosystem, METI, European Chips Act, Multilateralism, Balestra, ITRS, Organization, International, Provinces of Greece, LOS, TFRC, IRC, Society, Ministry, IRDS, TIA, Keio University, Nanoelectronics, Siemens Digital Industries Software, NIST, ICOS, MOU, Device, IEEE, NSTC, WSC, IRCS, Electronics, IEEE CS, TSMC, Faculty, IAC, Task force, Visiting scholar, Consumer electronics, Mobile phone, Science, System, Semiconductor

LOS ALAMITOS, Calif., Dec. 12, 2023 /PRNewswire/ --The broad utilization of the IEEE International Roadmap for Devices and Systems (IRDS) is influencing the various Chips Acts worldwide.

Key Points: 
  • LOS ALAMITOS, Calif., Dec. 12, 2023 /PRNewswire/ --The broad utilization of the IEEE International Roadmap for Devices and Systems (IRDS) is influencing the various Chips Acts worldwide.
  • Initiatives in Europe, Japan, and the US are engaging the IRDS roadmap for guidance as their activities develop, said Tom Coughlin, President of IEEE.
  • IEEE International Roadmap for Devices and Systems maps the future for microelectronics industry.
  • The SiNANO Institute , European Academic and Scientific Association for Nanoelectronics and the Systems and Devices Roadmap of Japan (SDRJ) are founding members of IRDS.

Xpeedic Launches High-Speed Digital Signal Integrity, Power Integrity Suite at Design Automation Conference

Retrieved on: 
Monday, July 10, 2023
Hermes, IBIS, Comparison of EM simulation software, EDA, TSV, 3DIC, Statistics, Design Automation Conference, AC, Temperature, DOE, COM, DDR4, LPDDR5X, GUI, PEC, LPDDR, IEEE MTT-S International Microwave Symposium, IMS, AMI, JEDEC, D2D, Silicon, Conference, DAC, FEM, Video game, Mobile phone, Printed circuit board

EDA 2023 Suite Includes 2.5/3DIC SI/PI Simulation for Advanced Packaging,3D EM Simulation, SI/PI and Multiphysics Analysis, High-Speed System Simulation

Key Points: 
  • EDA 2023 Suite Includes 2.5/3DIC SI/PI Simulation for Advanced Packaging,3D EM Simulation, SI/PI and Multiphysics Analysis, High-Speed System Simulation
    SAN FRANCISCO, July 10, 2023 (GLOBE NEWSWIRE) -- Xpeedic today launched its high-speed digital signal integrity and power integrity (SI/PI) suite with significant features and upgrades to advanced packaging and high-speed design domains as the 60th Design Automation Conference (DAC) opens at Moscone Center West here.
  • The Xpeedic EDA 2023 Suite includes 2.5D and 3D signal integrity and power integrity simulation for advanced packaging, along with three platforms to support 3D Electromagnetic (EM) simulation, multi-domain co-simulation and high-speed system simulation.
  • It allows rapid analysis of signal, power, and temperature to ensure compliance with defined specifications, facilitating design iterations.
  • The Xpeedic EDA 2023 Suite for high-speed digital SI/PI and multi-physics simulation platforms is shipping now.

Synopsys 3DIC Compiler Qualified for Samsung Foundry's Multi-Die Integration Flow, Accelerating 2.5D and 3D Designs

Retrieved on: 
Wednesday, November 17, 2021
HPC, SNPS, EDA, LVS, AI, Samsung, STA, EMIR, DRC, RTL, Workflow, Silicon, Leadership, Solution, MDI, DFT, IC, Technology, 3D, Nasdaq, HFSS, Samsung Electronics, PPA, Prime time, Sensing, Efficiency, SOC, GM, Socs, Engineering, 3DIC, Compiler, IP, Semiconductor, 3D printing, Printed circuit board

(Nasdaq: SNPS ) today announced that its 3DIC Compiler unified 2.5D and 3D multi-die package co-design and co-analysis platform has been qualified for Samsung Foundry's Multi-Die Integration (MDI) flow.

Key Points: 
  • (Nasdaq: SNPS ) today announced that its 3DIC Compiler unified 2.5D and 3D multi-die package co-design and co-analysis platform has been qualified for Samsung Foundry's Multi-Die Integration (MDI) flow.
  • "Together, Synopsys and Samsung Foundry are easing the way to optimized multi-die designs through early to full system implementation and signoff analysis," said Sangyun Kim, vice president of Foundry Design Technology Team at Samsung Electronics.
  • 3DIC Compiler is a complete, end-to-end solution for efficient multi-die design and full-system integration.
  • "Samsung and Synopsys have worked closely to validate 3DIC Compiler for the foundry's MDI flow, providing our mutual customers with a tapeout-proven platform to optimize their innovative multi-die designs and get to market quickly."